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47.4.5.4 Single-wire operation
When CTRL[LOOPS] is set, the CTRL[RSRC] bit chooses between loop mode
(CTRL[RSRC] = 0) or single-wire mode (CTRL[RSRC] = 1). Single-wire mode
implements a half-duplex serial connection. The receiver is internally connected to the
transmitter output and to the TXD pin (the RXD pin is not used).
In single-wire mode, the CTRL[TXDIR] bit controls the direction of serial data on the
TXD pin. When CTRL[TXDIR] is cleared, the TXD pin is an input to the receiver and
the transmitter is temporarily disconnected from the TXD pin so an external device can
send serial data to the receiver. When CTRL[TXDIR] is set, the TXD pin is an output
driven by the transmitter, the internal loop back connection is disabled, and as a result the
receiver cannot receive characters that are sent out by the transmitter.
47.4.6 Infrared interface
The LPUART provides the capability of transmitting narrow pulses to an IR LED and
receiving narrow pulses and transforming them to serial bits, which are sent to the
LPUART. The IrDA physical layer specification defines a half-duplex infrared
communication link for exchanging data. The full standard includes data rates up to 16
Mbits/s. This module covers data rates only between 2.4 kbits/s and 115.2 kbits/s.
The LPUART has an infrared transmit encoder and receive decoder. The LPUART
transmits serial bits of data that are encoded by the infrared submodule to transmit a
narrow pulse for every zero bit. No pulse is transmitted for every one bit. When receiving
data, the IR pulses are detected using an IR photo diode and transformed to CMOS levels
by the IR receive decoder, external from the LPUART. The narrow pulses are then
stretched by the infrared receive decoder to get back to a serial bit stream to be received
by the LPUART. The polarity of transmitted pulses and expected receive pulses can be
inverted so that a direct connection can be made to external IrDA transceiver modules
that use active high pulses.
The infrared submodule receives its clock sources from the LPUART. One of these two
clocks are selected in the infrared submodule to generate either 1/OSR, 2/OSR, 3/OSR, or
4/OSR narrow pulses during transmission.
Functional description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
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NXP Semiconductors
Summary of Contents for MWCT101 S Series
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Page 50: ...Conventions MWCT101xS Series Reference Manual Rev 3 07 2019 50 NXP Semiconductors...
Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
Page 96: ...WCT101xS safety concept MWCT101xS Series Reference Manual Rev 3 07 2019 96 NXP Semiconductors...
Page 130: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 130 NXP Semiconductors...
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Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
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Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
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Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
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