Renesas Hitachi H8S/2191, Hardware Manual

Page: 63 / 1065

Rev. 2.0, 11/00, page 36 of 1037
Instruction Size
* 1
Function
DIVXS B/W Rd
÷
Rs
→
Rd
Performs signed division on data in two general registers: either
16 bits
÷
8 bits
→
8-bit quotient and 8-bit remainder or 32 bits
÷
16 bits
→
16-bit quotient and 16-bit remainder
CMP B/W/L Rd - Rs, Rd - #IMM
Compares data in a general register with data in another
general register or with immediate data, and sets CCR bits
according to the result
NEG B/W/L 0 - Rd
→
Rd
Takes the two's complement (arithmetic complement) of data in
a general register
EXTU W/L Rd (zero extension)
→
Rd
Extends the lower 8 bits of a 16-bit register to word size, or the
lower 16 bits of a 32-bit register to longword size, by padding
with zeros on the left
EXTS W/L Rd (sign extension)
→
Rd
Extends the lower 8 bits of a 16-bit register to word size, or the
lower 16 bits of a 32-bit register to longword size, by extending
the sign bit
TAS B @ERd - 0, 1
→
(<bit 7> of @ERd)
* 2
Tests memory contents, and sets the most significant bit (bit 7)
to 1
Note: * 1 Size refers to the operand size.
B: Byte
W: Word
L: Longword
*
2 Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.