Renesas Hitachi H8S/2191, Hardware Manual

Page: 630 / 1065

Rev. 2.0, 11/00, page 603 of 1037
27.3.6 JMP Instruction
(1) JMP Instruction (Register indirect)
When the trap address is the next instruction to the JMP instruction and the addressing mode
is a register indirect, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02AA.
Address bus
Interrupt
request
signal
JMP
execution
MOV.L
execution
Data
fetch Start of
exception
handling
029A 02A8 02AA 02A4 029C 02A6 02AC
029A JMP @ER0
029C NOP
029E NOP
02A0 NOP
02A2 NOP
02A4 MOV.L #DATA, ER1
02AA NOP
(@ER0 = H'02A4)
*
JMP
instruc-
tion
pre-fetch
NOP
instruc-
tion
pre-fetch
NOP
instruc-
tion
pre-fetch
MOV
instruc-
tion
pre-fetch
* Trap setting address
The underlines address is the
one to be actually stacked.
Figure 27.13 JMP Instruction (Register Indirect)
(2) JMP Instruction (Memory indirect)
When the trap address is the next instruction to the JMP instruction and the addressing mode
is memory indirect, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02E4.
Address bus
Interrupt
request
signal
JMP execution
Start of
exception
handling
0294 006C 02E4 006C 0296 006E 02E6
0294 JMP @@H'6C:8
0296 NOP
0298 NOP
02E4 NOP
02E6 NOP
: :
006C H'02E4
: :
*
Data
fetch
Internal
opera-
tion
JMP
instruc-
tion
pre-fetch
NOP
instruc-
tion
pre-fetch
NOP
instruc-
tion
pre-fetch
*
Trap setting address
The underlines address is the
one to be actually stacked.
Figure 27.14 JMP Instruction (Memory Indirect)