Renesas Hitachi H8S/2191, Hardware Manual

Page: 408 / 1065

Rev. 2.0, 11/00, page 381 of 1037
17.3.7 Output Comparing Flag (OCFA and OCFB) Setting Up Timing
The OCFA and OCFB are being set to 1 by the comparing match signal being output when the
values of the OCRA, OCRB and FRC match. The comparing match signal is generated at the
last state of the value match (the timing of the FRC's updating the matching count reading).
After the values of the OCRA, OCRB and FRC match, up until the count up clock signal is
generated, the comparing match signal will not be issued. Figure 17.10 shows the OCFA and
OCFB setting timing chart.
Comparing match
signal
OCFA, OCFB
OCRA, OCRB
FRC N
N
N+1
Figure 17.10 OCF Setting Up Timing
17.3.8 Overflow Flag (CVF) Setting Up Timing
The OVF is set to when the FRC overflows (H'FFFF
→
H'0000). Figure 17.11 shows the timing
chart for this case.
Overflowing
signal
FRC H'FFFF H'0000
OVF
Figure 17.11 OVF Setting Up Timing