Renesas Hitachi H8S/2191, Hardware Manual

Page: 374 / 1065

Rev. 2.0, 11/00, page 347 of 1037
searches. These DVCTL signals can also be used for phase controls of the capstan motor.
Also, by selecting the dividing clock as the clock source, it is possible to make a delay with the
edges of the DVCTL to provide the slow tracking mono-multi function.
16.3.4 Mode Identification
When making mode identification (2/4/6 identification) of the SP/LP/EP modes of reproducing
tapes, the TMRU-1 (CFG dividing circuit), TMRU-2 (capturing function/without reloading
function) and TMRU-3 (DVCTL dividing circuit) of the Timer R should be used.
The Timer R will become to the aforementioned status after a reset.
Under the aforementioned status, the divided CFG should be written into the reloading register
of the TMRU-1 and divided DVCTL should be written into the reloading register of the TMRU-
3. When the TMRU-3 underflows, the counter value of the TMRU-2 is captured. Such
capturing register value represents the number of the CFG within the DVCTL cycle.
As aforementioned, the Timer R can work to count the number of the CFG corresponding to "n"
times of DVCTL's or to identify the mode being searched.
For exemplary settings for the register, see section 16.5.1, Mode Identification.
16.3.5 Reeling Controls
CFG counts can be captured by making 16-bit capturing operation combining the TMRU-1 and
TMRU-2. By choosing the IRQ3 as the capture signal, and by counting the CFG within the
duration of the reel pulse being input through the
,54 pin, reeling controls, etc. can be
effected.
For exemplary settings for the register, see section 16.5.2, Reeling Controls.
16.3.6 Acceleration and Braking Processes of the Capstan Motor
When making intermittent movements such as those for slow reproductions or for still
reproductions, it is necessary to conduct quick accelerations and abrupt stoppings of the capstan
motor. The acceleration and braking processes will function to check if the revolution of a
capstan motor has reached the prescribed rate when accelerated or braked. For this purpose, the
TMRU-2 (reloading function) should be used.
When making accelerations:
(1) Set the AC/BR bit of the TMRM1 to acceleration. (Set to 1). Also, use the rising edge of
the CFG as the reloading signal.
(2) Set the prescribed time on the CFG frequency to deem as the acceleration has been finished,
into the reloading register.
(3) The TMRU-2 will work to down-count the reloading data.