Renesas Hitachi H8S/2191, Hardware Manual, Page: 340 / 1065

Rev. 2.0, 11/00, page 313 of 1037
14.2.4 Timer Counter J (TCJ)
0
1
1
1
R
2
1
R
3
1
4
1
R
5
1
6
1
7
R R R
TDR15
R
TDR16
1
R
TDR17 TDR14 TDR13 TDR12 TDR11 TDR10
Bit :
Initial value :
R/W :
The time counter J (TCJ) is an 8-bit readable down-counter which works to count down by the
internal clock inputs or external clock inputs. The inputting clock can be selected by the PS11
and PS10 bits of the TMJ. TCJ values can be readout always. Nonetheless, when the 8/16 bit of
the TMJ is being set to 1 (means when setting is made to 16-bit operation), reading is possible
under the word command only.
At this time, the TCK of the TMJ-2 can be read by the upper 8 bits and the TCJ can be read by
the lower 8 bits.
When the TCJ underflows (H'00
→
Reloading value), regardless of the operation mode setting
of the 8/16 bit, the TMJ1I bit of the TMJS will be set to 1. The TCJ and TLJ are being allocated
to the same address.
When reset, the TCJ is initialized to H'FF.
14.2.5 Timer Counter K (TCK)
0
1
1
1
R
2
1
R
3
1
4
1
R
5
1
6
1
7
R R R
TDR25
R
TDR26
1
R
TDR27 TDR24 TDR23 TDR22 TDR21 TDR20
Bit :
Initial value :
R/W :
The time counter K (TCK) is an 8-bit readable down-counter which works to count down by the
internal clock inputs or external clock inputs. The inputting clock can be selected by the PS21
and PS20 bits of the TMJ. TCK values can be readout always. Nonetheless, when the 8/16 bit
of the TMJ is being set to 1 (means when setting is made to 16-bit operation), reading is possible
under the word command only.
At this time, the TCK can be read by the upper 8 bits and the TCJ of the TMJ-1 can be read by
the lower 8 bits.
When the TCK underflows (H'00
→
Reloading value), the TMJ2I bit of the TMJS will be set to
1.
The TCK and TLK are being allocated to the same address.
When reset, the TCK is initialized to H'FF.