Renesas Hitachi H8S/2191, Hardware Manual

Page: 1031 / 1065

Rev. 2.0, 11/00, page 1004 of 1037
H'FFE2: Pull-Up MOS Select Register 2 PUR2: I/O Port
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5
0
7
0
R/W R/W R/W R/W
6
PUR24 PUR23 PUR22 PUR21 PUR20 PUR27 PUR26 PUR25
P2n pin has no pull-up MOS transistor
P2n pin has pull-up MOS transistor
0
1
(n = 7 to 0)
Bit :
Initial value :
R/W :
H'FFE3: Pull-Up MOS Select Register 3 PUR3: I/O Port
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5
0
7
0
R/W R/W R/W R/W
6
PUR34 PUR33 PUR32 PUR31 PUR30 PUR37 PUR36 PUR35
P3n pin has no pull-up MOS transistor
P3n pin has pull-up MOS transistor
0
1
(n = 7 to 0)
Bit :
Initial value :
R/W :
H'FFE4: Realtime Output Trigger Edge Select Register RTPEGR: I/O Port
0
0
1
0
R/W
2
1
3
1
4
1 1
5 6
1
7
RTPEGR1 RTPEGR0
1
R/W
0 0 Trigger input is disabled
RTPEGR0 RTPEGR1
1 Rising edge of trigger input is selected
0
1 Rising and falling edges of trigger input is selected
1 Falling edge of trigger input is selected
Realtime output trigger edge select bit
Realtime output trigger edge select
Bit :
Initial value :
R/W :
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