Renesas Hitachi H8S/2191, Hardware Manual

Page: 405 / 1065

Rev. 2.0, 11/00, page 378 of 1037
17.3.3 Output Comparing Signal Outputting Timing
When a comparing match occurs, the output level having been set by the OLVL of the TOCR is
output through the output comparing signal outputting pins (FTOA and FTOB).
Figure 17.5 shows the timing chart in case of the output comparing signal outputting A.
FRC
OLVLA
FTOA
Output comparing
signal outputting
A pin
N
N
Clearing
* 1
N
N
N+1 N+1
Comparing match
signal
OCRA
Note: 1. Execution of the command is to be designated by the software.
Figure 17.5 Output Comparing Signal Outputting A Timing
17.3.4 FRC Clearing Timing
The FRC can be cleared when the comparing match A occurs. Figure 17.6 shows the timing
chart when doing so.
FRC
Comparing match
A signal
N H' 0000
Figure17.6 FRC Clearing Timing by Occurrence of the Comparing Match A