Renesas Hitachi H8S/2191, Hardware Manual, Page: 612 / 1065

Rev. 2.0, 11/00, page 585 of 1037
26.2.5 Trigger Select Register (ADTSR)
0 1 2 3
0
4
R/W
5 6 7
— — — — — —
— — — — — —
TRGS1
0
R/W
TRGS0
1 1 1 1 1 1
Bit :
Initial value :
R/W :
The trigger select register (ADTSR) selects hardware- or external-triggered A/D conversion start
factor.
ADTSR is an 8-bit readable/writable register that is initialized to H'FC by a reset, and in module
stop mode, standby mode, watch mode, subactive mode and subsleep mode.
Bits 7 to 2: Reserved
These bits are reserved and are always read as 1. Writes are disabled.
Bits 1 and 0: Trigger Select
These bits select hardware- or external-triggered A/D conversion start factor. Set these bits
when A/D conversion is not in progress.
Bit 1 Bit 0
TRGS1 TRGS0 Description
0 Hardware- or external-triggered A/D conversion is disabled
(Initial value)
0
1 Hardware-triggered (ADTRG) A/D conversion is selected
0 Hardware-triggered (DFG) A/D conversion is selected 1
1 External-triggered (
$'75*
) A/D conversion is selected
26.2.6 Port Mode Register 0 (PMR0)
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5 6
0
7
PMR04 PMR03 PMR02 PMR01 PMR00
0
R/W
PMR07
R/W R/W R/W
PMR06 PMR05
Bit :
Initial value :
R/W :
Port mode register 0 (PMR0) controls switching of each pin function of port 0. Switching is
specified for each bit.
PMR0 is an 8-bit readable/writable register and is initialized to H'00 by a reset.
Bit 7 to 0: P07/AN7 to P00/AN0 pin switching (PMR07 to PMR00)
These bits set the P0n/ANn pin as the input pin for P0n or as the ANn pin for A/D conversion
analog input channel.