Renesas Hitachi H8S/2191, Hardware Manual, Page: 771 / 1065

Rev. 2.0, 11/00, page 744 of 1037
(a) Additional V pulses when sync signal is not detected
With additional V pulses, the pulse signal (OSCH) detected by the sync detector is
superimposed on the Vpulse and Mlevel signals generated by the head-switch timing
generator. If there is a lot of noise in the input sync signal (Csync), or a pulse is missing,
OSCH will be a complementary pulse, and therefore an H pulse of the period set in HRTR
and HPWR will be superimposed. In this case, there may be slight timing drift compared
with the normal sync signal, depending on the HRTR and FPWR setting, with resultant
discontinuity.
If no sync signal is input, the additional V pulse is generated as a complementary pulse. Set
the sync detector registers and activate the sync detector by manipulating the SYCT bit in the
sync signal control register (SYNCR). See section 28.15.7, Sync Signal Detector Activation.
Figures 28.45 and 28.46 show the additional V pulse timing charts.
HSW signal edge
OSCH
VPON=1, CUT=0, POL=1
Additional
V pulse
Vpulse
signal
Mlevel
signal
Figure 28.45 Additional V Pulse When Positive Polarity is Specified