Renesas Hitachi H8S/2191, Hardware Manual

Page: 765 / 1065

Rev. 2.0, 11/00, page 738 of 1037
28.11.7 Operations in Case of Transient Response
In case of transient response when the motor is activated, the digital filter computation circuit
must prevent computation due to a large error. The convergence of the computations becomes
slow and servo retraction becomes deteriorating if a large error is input to the filter circuit when
it is performing repeated computations. To prevent them from occurring, operate the filter (set
constants A and B) after pulling in the speed and phase within a certain range of error, initialize
Z
-1
(set initial values in CZp, CZs, DZp, DZs)(see section 28.11.8, Initialization of Z
-1
), or use
the error data limit function (see section regarding the error detector).
28.11.8 Initialization of Z
-1
Z
-1
can be initialized by its delay initialization register (CZp, CZs, DZp, DZs). Loading to Z
-1
is
performed automatically by bits 4 and 3 of CFIC and DFIC (CZPON, CZSON, DZPON,
DZSON). Writing in register is always available, but loading in Z
-1
is not possible when the
digital filter is performing calculation processing in relation to such register. In such a case,
loading to Z
-1
will be done the next time computation begins. Figure 28.42 shows the
initialization circuit of Z
-1
.
The delay initialization register sets 12-bit data. The MSB (bit 11) is a signed bit. Z
-1
has 24 bits
for integers and 8 bits for decimals. Accordingly, the same value as the signed bits should be set
in the 13 bits on the MSB side of Z
-1
, and 0 in the entire decimal section.
Example: Value set for the delay initialization register Value set for Z
-1
MSB
0
MSB
Set here the value in the
signed bits
Fixed
1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0