Rev. 2.0, 11/00, page 978 of 1037
H'D139: Timer Counter J TCJ: Timer J
0
1
1
1
R
2
1
R
3
1
4
1
R
5
1
6
1
7
R
R
R
TDR15
R
TDR16
1
R
TDR17
TDR14
TDR13
TDR12
TDR11
TDR10
Bit :
Initial value :
R/W :
H'D13A: Timer Mode Register J TMJ: Timer J
0
0
1
0
R
2
0
R/W
3
0
4
0
R/W
5
0
6
0
7
R/W
R/W
R/W
ST
R/W
PS10
0
R/W
PS11
8/16
PS21
PS20
TGL
T/R
TMJ-2 toggle flag
TMJ-2 toggle output is 0
TMJ-2 toggle output is 1
0
1
Timer output/remote-controller output
select bit
TMJ-1 timer output
TMJ-1 toggle output (data
transmitted from remote
controller)
0
1
TMJ-1 and TMJ-2 operate separately
TMJ-1 and TMJ-2 operate together as 16-bit
0
1
8-bit/16-bit operation select bit
Stop TMJ-1 clock supply in remote control mode
Start TMJ-1 clock supply in remote control mode
0
1
Remote-controlled operation start bit
Note:
*
External clock edge selection is set in edge select register (IEGR).
See section explaining edge select register (IEGR).
When using external clock in remote control mode, set opposite edges for IRQ1 and IRQ2 edges
(eg. When falling edge is set for IRQ1, set rising edge for IRQ2).
0
0
PS10
PS11
1
0
1
PSS, count at /512
PSS, count at /256
PSS, count at /4
1
Count at rising/falling edge of external clock (IRQ1)
TMJ-1 input clock select bits
TMJ-1 input clock select
Notes: 1. The edge selection for the external clock inputs is made by setting the edge select
register (IEGR). See section 6.2.4, Edge Select Register (IEGR) for more
information.
2. Don't care.
3. Available only in the H8S/2194C series.
PS20
PS21
PS22
*
3
Counthing by the PSS, /16384
Counthing by the PSS, /2048
Counting at underflowing of the TMJ-1
Counting at the leading edge or the trailing edge of
the external clock inputs (IRQ2)
*
1
Counting by the PSS, /1024 (available only the
H8S/2194C series)
TMJ-2 input clock select bits
TMJ-2 input clock select
Bit :
Initial value :
R/W :
0
1
0
1
0
1
*
2
*
2
0
1
Summary of Contents for Hitachi H8S/2191
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