Renesas Hitachi H8S/2191, Hardware Manual, Page: 448 / 1065

Rev. 2.0, 11/00, page 421 of 1037
20.3 Operation
20.3.1 Output Waveform
The PWM signal generator combines the error data with the output from an internal pulse
generator to produce a pulse-width modulated signal.
When Vcc/2 is set as the reference value, the following conditions apply:
•
When the motor is running at the correct sped and phase, the PWM signal is output with a
50% duty cycle.
•
When the motor is running behind the correct speed or phase, it is corrected by periodically
holding part of the PWM signal low. The part held low depends on the size of the error.
•
When the motor is running ahead of the correct speed or phase, it is corrected by periodically
holding part of the PWM signal high. The part held high depends on the size of the error.
When the motor is running at the correct speed and phase, the error data is a 12-bit value
representing 1/2 (1000 0000 0000), and the PWM output has the same frequency as the selected
division clock.
After the error data has been converted into a PWM signal, the PWM signal can be smoothed
into a DC voltage by an external low-pass filter (LPF). The smoothes error data can be used to
control the motor.
Figure 20.2 shows sample waveform outputs.
The 12-bit PWM pin outputs a low-level signal upon reset, in power-down mode or at module-
stop.