Renesas Hitachi H8S/2191, Hardware Manual

Page: 434 / 1065

Rev. 2.0, 11/00, page 407 of 1037
19.2 Register Descriptions
19.2.1 Bit PWM Data Registers 0, 1, 2 and 3 (PWR0, PWR1, PWR2, PWR3)
(1) PWR0
0
0
1
0
W
2
0
W
3
0
4
0
W
0
W
5 6
0
7
PW04 PW03 PW02 PW01 PW00
0
W
PW07
W W W
PW06 PW05
Bit :
Initial value :
R/W :
(2) PWR1
0
0
1
0
W
2
0
W
3
0
4
0
W
0
W
5 6
0
7
PW14 PW13 PW12 PW11 PW10
0
W
PW17
W W W
PW16 PW15
Bit :
Initial value :
R/W :
(3) PWR2
0
0
1
0
W
2
0
W
3
0
4
0
W
0
W
5 6
0
7
PW24 PW23 PW22 PW21 PW20
0
W
PW27
W W W
PW26 PW25
Bit :
Initial value :
R/W :
(4) PWR3
0
0
1
0
W
2
0
W
3
0
4
0
W
0
W
5 6
0
7
PW34 PW33 PW32 PW31 PW30
0
W
PW37
W W W
PW36 PW35
Bit :
Initial value :
R/W :
8-bit PWM data registers 0, 1, 2 and 3 (PWR0, PWR1, PWR2, PWR3) control the duty cycle at
8-bit PWM pins. The data written in PWR0, PWR1, PWR2 and PWR3 correspond to the high-
level width of one PWM output waveform cycle (256 states).
When data is set in PWR0, PWR1, PWR2 and PWR3, the contents of the data are latched in the
PWM waveform generators, updating the PWM waveform generation data.
PWR0, PWR1, PWR2 and PWR3 are write-only registers. When read, all bits are always read
as 1.
PWR0, PWR1, PWR2 and PWR3 are initialized to H'00 by a reset.