Renesas Hitachi H8S/2191, Hardware Manual

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Rev. 2.0, 11/00, page 546 of 1037
25.3 Operation
25.3.1 I
2
C Bus Data Format
The I
2
C bus interface has serial and I
2
C bus formats.
The I
2
C bus formats are addressing formats with an acknowledge bit. These are shown in figure
25.3. The first frame following a start condition always consists of 8 bits.
The serial format is a non-addressing format with no acknowledge bit. This is shown in figure
25.4.
Figure 25.5 shows the I
2
C bus timing.
The symbols used in figures 25.3 to 25.5 are explained in table 25.4.
S A SLA
7 n
R/W DATA A
1
1 m
1 1 1
A/A
1
P
1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = 1 or above)
S SLA
7 n1 7
R/W A DATA
1 1
1 m1
1
A/A
1
S
1
SLA R/W
1
1 m2
A
1
DATA
n2
A/A
1
P
1
Upper: Transfer bit count (n1 and N2 = 1 to 8)
Lower: Transfer frame count (m1 and m2 = 1 or above)
(a) FS = 0 or FSX = 0
(b) Start condition transmission, FS = 0 or FSX = 0
Figure 25.3 I
2
C Bus Data Formats (I
2
C Bus Formats)
S DATA
8 n
DATA
1
1 m
P
1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = 1 or above)
FS = 1 and FSX = 1
Figure 25.4 I
2
C Bus Data Format (Serial Format)