Renesas Hitachi H8S/2191, Hardware Manual

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Rev. 2.0, 11/00, page 19 of 1037
(d) Exception Vector Table and Memory Indirect Branch Addresses
In normal mode the top area starting at H'0000 is allocated to the exception vector table.
One branch address is stored per 16 bits. The configuration of the exception vector table
in normal mode is shown in figure 2.2. For details of the exception vector table, see
section 5, Exception Handling.
H'0000
H'0001
H'0002
H'0003
H'0004
H'0005
H'0006
H'0007
H'0008
H'0009
H'000A
H'000B
Reset exception vector
Exception vector 1
Exception vector 2
Exception vector table
(Reserved for system use)
Figure 2.2 Exception Vector Table (Normal Mode)
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR
instructions uses an 8-bit absolute address included in the instruction code to specify a
memory operand that contains a branch address. In normal mode the operand is a 16-bit
word operand, providing a 16-bit branch address. Branch addresses can be stored in the
top area from H'0000 to H'00FF. Note that this area is also used for the exception vector
table.