Renesas Hitachi H8S/2191, Hardware Manual

Page: 296 / 1065

Rev. 2.0, 11/00, page 269 of 1037
Bit 1: Timer B event input edge select (PMR51)
PMR51 selects the input edge sense of the TMBI pin.
Bit 1
PMR51 Description
0 The timer B event input detects the falling edge (Initial value)
1 The timer B event input detects the rising edge
Bit 0: Reserved Bit
When the bit is read, 1 is always read. The write operation is invalid.
(2) Port Control Register 5 (PCR5)
0
0
1
0
2 3 4
1 1
5
1
7
1
6
— — — —
— — — —
W
PCR51
W
PCR50
0
W
PCR52
0
W
PCR53
Bit :
Initial value :
R/W :
Port control register 5 (PCR5) controls the I/Os of pins P53 to P50 of port 5 in a unit of bit.
When PCR5 is set to 1, the corresponding P53 to P50 pins become output pins, and when it is set
to 0, they become input pins. When the relevant pin is set to a general I/O, settings of PCR5 and
PDR5 are valid.
PCR5 is an 8-bit write-only register. When PCR5 is read, 1 is read. When reset, PCR5 is
initialized to H'F0.
Bits 7 to 4 are reserved bits.
Bit n
PCR5n Description
0 The P5n pin functions as an input pin (Initial value)
1 The P5n pin functions as an output pin
(n = 3 to 0)