Renesas Hitachi H8S/2191, Hardware Manual

Page: 277 / 1065

Rev. 2.0, 11/00, page 250 of 1037
(3) Port Data Register 2 (PDR2)
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5
0
7
0
R/W R/W R/W R/W
6
PDR24 PDR23 PDR22 PDR21 PDR20 PDR27 PDR26 PDR25
Bit :
Initial value :
R/W :
Port data register 2 (PDR2) stores the data for the pins P27 to P20 of port 2. When PCR2 is 1
(output), the PDR2 values are directly read if port 2 is read. Accordingly, the pin states are not
affected. When PCR2 is 0 (input), the pin states are read if port 2 is read.
PDR2 is an 8-bit read/write enable register. When reset, PDR2 is initialized to H'00.
(4) MOS Pull-Up Select Register 2 (PUR2)
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5
0
7
0
R/W R/W R/W R/W
6
PUR24 PUR23 PUR22 PUR21 PUR20 PUR27 PUR26 PUR25
Bit :
Initial value :
R/W :
MOS pull-up selector register 2 (PUR2) controls the ON and OFF of the MOS pull-up transistor
of port 2. Only the pin whose corresponding bit of PCR1 was set to 0 (input) becomes valid. If
the corresponding bit of PCR2 is set to 1 (output), the corresponding bit of PUR2 becomes
invalid and the MOS pull-up transistor is turned off.
PUR2 is an 8-bit read/write enable register. When reset, PUR2 is initialized to H'00.
Bit n
PMR2n Description
0 The P2n pin has no MOS pull-up transistor (Initial value)
1 The P2n pin has a MOS pull-up transistor
(n = 7 to 0)