Renesas Hitachi H8S/2191, Hardware Manual, Page: 309 / 1065

Rev. 2.0, 11/00, page 282 of 1037
(3) Port Data Register 7 (PDR7)
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5 6
0
7
PDR74 PDR73 PDR72 PDR71 PDR70
0
R/W
PDR77
R/W R/W R/W
PDR76 PDR75
Bit :
Initial value :
R/W :
Port data register 7 (PDR7) stores the data for the pins P77 to P70 of port 7.
When PCR7 is 1 (output), the PDR7 values are directly read if port 7 is read. Accordingly, the
pin states are not affected. When PCR7 is 0 (input), the pin states are read if port 7 is read.
PDR7 is an 8-bit read/write enable register. When reset, PDR7 is initialized to H'00.
11.9.3 Pin Functions
This section describes the port 7 pin functions and their selection methods.
(1) P77/PPG7 to P70/PPG0
P77/PPG7 to P70/PPG0 are switched as shown below according to the PMR7n bit in PMR7
and the PCR7n bit in PCR7.
PMR7n PCR7n Pin Function
0 P7n input pin 0
1 P7n output pin
1 * PPGn input pin
Note:
*
Don't care. (n = 7 to 0)
11.9.4 Pin States
Table 11.25 shows the port 7 pin states in each operation mode.
Table 11.25 Port 7 Pin States
Pins Reset Active Sleep Standby Watch Subactive Subsleep
P77/PPG7
to
P70/PPG0
High-
impedance
Operation Holding High-
impedance
High-
impedance
Operation Holding