Renesas Hitachi H8S/2191, Hardware Manual, Page: 76 / 1065

Rev. 2.0, 11/00, page 49 of 1037
Table 2.13 Effective Address Calculation
No.
Addressing Mode and
Instruction Format Effective Address
Calculation
Effective Address (EA)
1 Register direct (Rn)
op rm rn
Operand is general register
contents
2 Register indirect (@ERn)
General register contents
31 0 31 0
r op
24 23
Don’t
care
3 Register indirect with displacement
@(d:16, ERn) or @(d:32, ERn)
General register contents
Sign extension disp
31 0
31 0
31 0
op r
disp
Don’t
care
24 23
4 Register indirect with post-increment or pre-decrement
•
Register indirect with post-increment @ERn+
General register contents
1, 2, or
4
31 0
31 0
r op
Don’t
care
24 23
•
Register indirect with pre-decrement @–ERn
General register contents
1, 2, or
4
Byte
Word
Longword
1
2
4
Operand
Size
Value
Added
31 0
31 0
op
r
Don’t
care
24 23