Renesas Hitachi H8S/2191, Hardware Manual

Page: 318 / 1065

Rev. 2.0, 11/00, page 291 of 1037
12.2 Descriptions of Respective Registers
12.2.1 Timer Mode Register A (TMA)
0
0
1
0
R/W
2
0
R/W
3
0
4
1
5
— —
— —
1
6
0
7
R/W R/W R/W
TMAIE
0
R/(W)
*
TMAOV TMA3 TMA2 TMA1 TMA0
Note: * Only 0 can be written to clear the flag.
Bit :
Initial value :
R/W :
The timer mode register A (TMA) works to control the interrupts of the Timer A and to select
the input clock.
TMA is an 8-bit read/write register. When reset, the TMA will be initialized to H'30.
Bit 7: Timer A Overflow Flag (TMAOV)
This is a status flag indicating the fact that the TCA is overflowing (H'FF
→
H'00).
Bit 7
TMAOV Description
0 [Clearing conditions] (Initial value)
When 0 is written to the TMAOV flag after reading the TMAOV flag under the status
where TMAOV = 1
1 [Setting conditions]
When the TCA overflows
Bit 6: Enabling Interrupt of the Timer A (TMAIE)
This bit works to permit/prohibit occurrence of interrupt of the Timer A (TMAI) when the TCA
overflows and when the TMAOV of the TMA is set to 1.
Bit 6
TMAIE Description
0 Prohibits occurrence of interrupt of the Timer A (TMAI) (Initial value)
1 Permits occurrence of interrupt of the Timer A (TMAI)
Bits 5 and 4: Reserved
When they are read, 1 will always be readout. Writes are disabled.