Renesas Hitachi H8S/2191, Hardware Manual, Page: 218 / 1065

Rev. 2.0, 11/00, page 191 of 1037
(1) Automatic SCI Bit Rate Adjustment
Start
bit
Stop
bit
D0 D1 D2 D3 D4 D5 D6 D7
Low period (9 bits) measured (H'00 data) High period
(1 or more bits)
Figure 8.9 Automatic SCI Bit Rate Adjustment
When boot mode is initiated, the MCU measures the low period of the asynchronous SCI
communication data (H'00) transmitted continuously from the host. The SCI transmit/receive
format should be set as follows: 8-bit data, 1 stop bit, no parity. The MCU calculates the bit rate
of the transmission from the host from the measured low period, and transmits one H'00 byte to
the host to indicate the end of bit rate adjustment. The host should confirm that this adjustment
end indication (H'00) has been received normally, and transmit one H'55 byte to the MCU. If
reception cannot be performed normally, initiate boot mode again (reset), and repeat the above
operations. Depending on the host's transmission bit rate and the MCU's system clock
frequency, there will be a discrepancy between the bit rates of the host and the MCU. To ensure
correct SCI operation, the host's transfer bit rate should be set to (2400, 4800, or 9600) bps.
Table 8.6 shows typical host transfer bit rates and system clock frequencies for which automatic
adjustment of the MCU's bit rate is possible. The boot program should be executed within this
system clock range.
Table 8.6 System Clock Frequencies for which Automatic Adjustment of This LSI Bit
Rate is Possible
Host Bit Rate
System Clock Frequency for which Automatic Adjustment
of This LSI Bit Rate is Possible
9600 bps 8 MHz to 10 MHz
4800 bps 4 MHz to 10 MHz