Renesas Hitachi H8S/2191, Hardware Manual

Page: 124 / 1065

Rev. 2.0, 11/00, page 97 of 1037
Section 6 Interrupt Controller
6.1 Overview
6.1.1 Features
This LSI controls interrupts by means of an interrupt controller. The interrupt controller has the
following features:
(1) Two Interrupt Control Modes
•
Either of two interrupt control modes can be set by means of the INTM1 and INTM0 bits
in the system control register (SYSCR).
(2) Priorities Settable with ICR
•
An interrupt control register (ICR) is provided for setting interrupt priorities. Three
priority levels can be set for each module for all interrupts except NMI.
(3) Independent Vector Addresses
•
All interrupt sources are assigned independent vector addresses, making it unnecessary
for the source to be identified in the interrupt handling routine.
(4) Seven External Interrupt Pins
•
NMI is the highest-priority interrupt, and is accepted at all times. Falling edge, rising
edge, or both edge detection can be selected for the NMI interrupt.
•
Falling edge, rising edge, or both edge detection can be selected for interrupt IRQ0.
•
Falling edge or rising edge can be individually selected for interrupts IRQ5 to IRQ1.