Renesas Hitachi H8S/2191, Hardware Manual

Page: 1029 / 1065

Rev. 2.0, 11/00, page 1002 of 1037
H'FFDC: Port Mode Register 5: PMR5: I/O Port
0
1
1
0
2 3 4
1 1
5
1
7
1
6
R/W
PMR51
0
R/W
PMR52
0
R/W
PMR53
P53/TRIG pin function as P53 I/O port
P53/TRIG pin function as TRIG input port
0
1
P53/TRIG pin function select bit
P52/TMBI pin function as P52 I/O port
P52/TMBI pin functions as TMB input port
0
1
P52/TMBI pin function select bit
The timer B event input detects the falling edge
The timer B event input detects the rising edge
0
1
Timer B event input edge select
Bit :
Initial value :
R/W :
— — — — —
— — — — —
H'FFDD: Port Mode Register 6 PMR6: I/O Port
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5 6
0
7
PMR64 PMR63 PMR62 PMR61 PMR60
0
R/W
PMR67
R/W R/W R/W
PMR66 PMR65
P6n/RPn pin functions as P6n I/O port
P6n/RPn pin functions as RPn output port
0
1
P67/RP7 to P60/RP0 pin function select bit
(n = 7 to 0)
Bit :
Initial value :
R/W :
H'FFDE: Port Mode Register 7 PMR7: I/O Port
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5 6
0
7
PMR74 PMR73 PMR72 PMR71 PMR70
0
R/W
PMR77
R/W R/W R/W
PMR76 PMR75
P77/PPG7 to P70/PPG0 pin function select bit
P7n/PPGn pin functions as P7n I/O port
P7n/PPGn pin functions as PPGn output port
0
1
(n = 7 to 0)
Bit :
Initial value :
R/W :