Renesas Hitachi H8S/2191, Hardware Manual

Page: 799 / 1065

Rev. 2.0, 11/00, page 772 of 1037
(1) VISS (Index) Detect/Record Mode
VISS detection is carried out by the VISS control circuit, which counts 1 pulses in the PB-
CTL signal. If the pulse count detects any value set in the VISS interrupt setting bits (bits 5,
6 and 7 in the duty I/O register), an interrupt request is generated and the duty I/O flag is
cleared to 0.
At VISS record or rewrite, INDEX code is automatically written. INDEX code is composed
of continuous 62-bit data with 0 pulse data at both edges.
Examples of bit strings and the duty I/O flag at VISS detection/record are illustrated in figure
28.57.
0 Tape direction
Duty I/O flag
(a) VISS detection (INDEX: Thirty-two 1 pulse setting)
1 1 1 1
61±3 bits
Thirty-two 1 pulses
detected
IRRCTL
63±3 bits
Start
1 1 1 1 0
0 Tape direction
Duty I/O flag
(b) VISS record
1 1 1 1
62 bits
IRRCTL
64 bits
Start
1 1 1 1 0
1 2 3 62 63 64
Figure 28.57 Examples of VISS Bit Strings and Duty I/O Flag