Renesas Hitachi H8S/2191, Hardware Manual

Page: 214 / 1065

Rev. 2.0, 11/00, page 187 of 1037
8.3.5 Serial/Timer Control Register (STCR)
7
—
0
—
6
IICX
0
R/W
5
IICRST
0
R/W
4
—
0
—
3
FLSHE
0
R/W
0
—
0
—
2
—
0
—
1
—
0
—
Bit
Initial value
R/W
:
:
:
STCR is an 8-bit readable/writable register that controls register access, the I
2
C bus interface
operating mode, and on-chip flash memory (in F-ZTAT versions), and also selects the I
2
C bus
interface serial clock frequency. For details on functions not related to on-chip flash memory,
see section 25.2.7, Serial/Timer Control Register (STCR), and descriptions of individual
modules. If a module controlled by STCR is not used, do not write 1 to the corresponding bit.
STCR is initialized to H'00 by a reset.
Bits 6 to 5: I
2
C Control (IICX, IICRST)
These bits control the operation of the I
2
C bus interface. For details, see section 25, I
2
C Bus
Interface.
Bit 3: Flash Memory Control Register Enable (FLSHE)
Setting the FLSHE bit to 1 enables read/write access to the flash memory control registers. If
FLSHE is cleared to 0, the flash memory control registers are deselected. In this case, the flash
memory control register contents are retained.
Bit 3
FLSHE Description
0 Flash memory control registers deselected (Initial value)
1 Flash memory control registers selected
Bits 7, 4 and 2 to 0: Reserved