Renesas Hitachi H8S/2191, Hardware Manual, Page: 931 / 1065

Rev. 2.0, 11/00, page 904 of 1037
Instruction 1 2 3 4 5 6 7 8 9
STMAC MACH,ERd
STMAC MACL,ERd
Cannot be used in this LSI.
SUB.B Rs,Rd R:W NEXT
SUB.W #xx:16,Rd R:W 2nd R:W NEXT
SUB.W Rs,Rd R:W NEXT
SUB.L #xx:32,ERd R:W 2nd R:W 3nd R:W NEXT
SUB.L ERs,ERd R:W NEXT
SUB #1/2/4,ERd R:W NEXT
SUBX #xx:8,Rd R:W NEXT
SUBX Rs,Rd R:W NEXT
TAS @ERd
*
8
R:W 2nd R:W NEXT R:B:M EA W:B EA
TRAPA #x:2 R:W NEXT Internal
operation 1
state W:W stack(L) W:W stack(H) W:W
stack(EXR) R:W:M VEC R:W VEC+2 Internal
operation 1
state R:W
*
7
XOR.B #xx:8,Rd R:W NEXT
XOR.B Rs,Rd R:W NEXT
XOR.W #xx:16,Rd R:W 2nd R:W NEXT
XOR.W Rs,Rd R:W NEXT
XOR.L #xx:32,ERd R:W 2nd R:W 3rd R:W NEXT
XOR.L ERs,ERd R:W 2nd R:W NEXT
XORC #xx:8,CCR R:W NEXT
XORC #xx:8,EXR R:W 2nd R:W NEXT
Reset exception
handling R:W:M VEC R:W VEC+2 Internal
operation 1
state R:W
* 5
Interrupt exception
handling R:W
* 6
Internal
operation 1
state W:W stack(L) W:W stack(H) W:W
stack(EXR) R:W:M VEC R:W VEC+2 Internal
operation 1
state R:W
* 7
Notes: 1. EAs is the contents of ER5, and EAd is the contents of ER6.
2. 1 is added to EAs and EAd after execution. n is the initial value of R4L or R4. When
0 is set to n, R4L or R4 is not executed.
3. Repeated twice for 2-unit retract/return, three times for 3-unit retract/return, and four
times for 4-retract/return.
4. Head address after return.
5. Start address of the program.
6. Pre-fetch address obtained by adding 2 to the PC to be retracted.
When returning from sleep mode, standby mode or watch mode, internal operation is
executed instead of read operation.
7. Head address of the interrupt process routine.
8. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.