Renesas Hitachi H8S/2191, Hardware Manual, Page: 323 / 1065

Rev. 2.0, 11/00, page 296 of 1037
13.1.3 Pin Configuration
Table 13.1 shows the pin configuration of the Timer B.
Table 13.1 Pin Configuration
Name Abbrev. I/O Function
Event inputs to the Timer B TMBI Input Event input pin for inputs to the TCB
13.1.4 Register Configuration
Table 13.2 shows the register configuration of the Timer B.
The TCB and TLB are being allocated to the same address. Reading or writing determines the
accessing register.
Table 13.2 Register Configuration
Name Abbrev. R/W Size Initial Value Address *
Timer mode register B TMB R/W Byte H'18 H'D110
Timer counter B TCB R Byte H'00 H'D111
Timer load register B TLB W Byte H'00 H'D111
Port mode register 5 PMR5 R/W Byte H'F1 H'FFDC
Note:
*
Lower 16 bits of the address.