Renesas Hitachi H8S/2191, Hardware Manual

Page: 443 / 1065

Rev. 2.0, 11/00, page 416 of 1037
20.2 Register Descriptions
20.2.1 12-Bit PWM Control Registers (CPWCR, DPWCR)
(1) CPWCR
0
0
1
1
W
2
0
W
3
0
4
0
W
0
W
5 6
1
7
CH/L CSF/DF CCK2 CCK1 CCK0
0
W
CPOL
W W W
CDC CHiZ
Bit :
Initial value :
R/W :
(2) DPWCR
0
0
1
1
W
2
0
W
3
0
4
0
W
0
W
5 6
1
7
DH/L DSF/DF DCK2 DCK1 DCK0
0
W
DPOL
W W W
DDC DHiZ
Bit :
Initial value :
R/W :
CPWCR is the PWM output control register for the capstan motor. DPWCR is the PWM output
control register for the drum motor. Both are 8-bit writable registers.
CPWCR and DPWCR are initialized to H'42 by a reset, or in sleep mode, standby mode, watch
mode, subactive mode, subsleep mode, or module stop mode of the servo circuit.
Bit 7: Polarity Invert (POL)
This bit can invert the polarity of the modulated PWM signal for noise suppression and other
purposes. This bit is invalid when fixed output is selected (when bit DC is set to 1).
Bit 7
POL Description
0 Output with positive polarity (Initial value)
1 Output with inverted polarity
Bit 6: Output Select (DC)
Selects either PWM modulated output, or fixed output controlled by the pin output bits (Bits 5
and 4).