Renesas Hitachi H8S/2191, Hardware Manual, Page: 867 / 1065

Rev. 2.0, 11/00, page 840 of 1037
3. Time to erase 1 block (total time of setting E-bit of the flash memory control register.
Erasing verify time is not included).
4. Maximum programming time (t
P
(max.)) = Wait time after P-bit setting (z)
×
Maximum
No. of programming (N)
5. No. of times when wait time after P-bit setting (z) = 200
µ
s. Set maximum No. of
programming shall be set less than maximum programming time (t
P
(max.)) according
to the actual setting (z).
6. Relationship between wait time after E-bit setting (z) and maximum No. of erasing (N)
for maximum erasing time (t
E
(max.)) is as follows:
t
E
(max.) = Wait time after E-bit setting
×
Maximum No. of erasing (N)
Set the (z) and (N) values so that they satisfy the above equation.
(Ex.) When z = 5 [ms], N = 240 times
(Ex.) When z = 10 [ms], N = 120 times
29.2.8 Usage Note
The F-ZTAT version and the Mask ROM version satisfy the electrical characteristics indicated
in this manual, but the actual power value, operating margin, and noise margin may differ from
those in this manual, due to the difference of production process, on-chip ROM, layout pattern,
etc.
When executing the system examination using the F-ZTAT version, be sure to execute the same
system examination using the Mask ROM version when changing to the Mask ROM version.