Renesas Hitachi H8S/2191, Hardware Manual

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Rev. 2.0, 11/00, page 470 of 1037
(2) Clock
Either an internal clock generated by the built-in baud rate generator or an external clock
input at the SCK1 pin can be selected as the SCI1's serial clock, according to the setting of
the C/
$ bit in SMR1 and the CKE1 and CKE0 bits in SCR1. For details of SCI1 clock
source selection, see table 23.9.
When an external clock is input at the SCK1 pin, the clock frequency should be 16 times the
bit rate used.
When the SCI1 is operated on an internal clock, the clock can be output from the SCK1 pin.
The frequency of the clock output in this case is equal to the bit rate, and the phase is such
that the rising edge of the clock is at the center of each transmit data bit, as shown in figure
23.3.
0
1 frame
D0 D1 D2 D3 D4 D5 D6 D7 0/1 1 1
Figure 23.3 Relation between Output Clock and Transfer Data Phase
(Asynchronous Mode)