Renesas Hitachi H8S/2191, Hardware Manual

Page: 416 / 1065

Rev. 2.0, 11/00, page 389 of 1037
No.
Re-writing timing
for the CKS1 and
CKS0
FRC operation
3 High
→
Low level
changeover
Clock before
the changeover
Clock after
the changeover
Count
clock
FRC
Re-writing of the CKS1 and CKS0
N
*
N+1 N+2
4 High
→
High level
changeover
Clock before
the changeover
Clock after
the changeover
Count
clock
FRC
Re-writing of the CKS1 and CKS0
N N+1 N+2
Note:
*
The count clock signals are issued deeming the changeover timing as the falling edge
to have the FRC to count up.