Renesas Hitachi H8S/2191, Hardware Manual

Page: 965 / 1065

Rev. 2.0, 11/00, page 938 of 1037
H'D074: X-Value/TRK-Value Control Register
XTCR: X-Value, TRK-Value Adjustment Circuit
0
0
1
0
R/W
2
0
W
3
0
4
0
W
5
0
6
0
7
R/W W W
AT/MU
W
CAPRF TRK/X EXC/REF XCS DVREF1 DVREF0
1
Capstan phase adjustment auto/manual select bit
0 Manual mode
1 Auto mode
External sync signal edge select bit
0 Generated at EXCAP rising edge
1 Generated at EXCAP rising and falling edge
Capstan phase adjustment register select bit
0 CAPREF30 is generated only by XDR setting value
1 CAPREF30 is generated by XDR and TRDR setting values
Reference signal select bit
0 Generated by REF30P signal
1 Generated by external referece signal
Clock source select bit
0
φ
s
1
φ
s/2
REF30P frequency division rate select bit
DVREF1 DVREF0 Description
0 0 1-division
1 2-division
1 0 3-division
1 4-division
Bit :
Initial value :
R/W :
—
—
H'D078: Drum 12-bit PWM Data Register DPWDR: Drum 12-Bit PWM
1
0
R/W
DPWDR1
0
0
R/W
DPWDR0
3
0
R/W
DPWDR3
2
0
R/W
DPWDR2
5
0
R/W
DPWDR5
4
0
R/W
DPWDR4
7
0
R/W
DPWDR7
6
0
R/W
DPWDR6
9
0
R/W
DPWDR9
8
0
R/W
DPWDR8
11
0
R/W
DPWDR11
10
0
R/W
DPWDR10
12
1
13
1
14
1
15
1
Bit :
Initial value :
R/W :
— — — —
— — — —