Renesas Hitachi H8S/2191, Hardware Manual

Page: 24 / 1065

Rev. 2.0, 11/00, page xv of xviii
27.3.2 Enable ............................................................................................................. 597
27.3.3 Bcc Instruction ................................................................................................ 597
27.3.4 BSR Instruction ............................................................................................... 601
27.3.5 JSR Instruction ................................................................................................ 602
27.3.6 JMP Instruction ............................................................................................... 603
27.3.7 RTS Instruction ............................................................................................... 604
27.3.8 SLEEP Instruction ........................................................................................... 604
27.3.9 Competing Interrupt ........................................................................................ 607
Section 28 Servo Circuits ............................................................................... 611
28.1 Overview ..................................................................................................................... 611
28.1.1 Functions......................................................................................................... 611
28.1.2 Block Diagram ................................................................................................ 612
28.2 Servo Port.................................................................................................................... 614
28.2.1 Overview......................................................................................................... 614
28.2.2 Block Diagram ................................................................................................ 614
28.2.3 Pin Configuration ............................................................................................ 617
28.2.4 Register Configuration..................................................................................... 618
28.2.5 Register Descriptions....................................................................................... 618
28.2.6 DFG/DPG Input Signals .................................................................................. 625
28.3 Reference Signal Generators ........................................................................................ 626
28.3.1 Overview......................................................................................................... 626
28.3.2 Block Diagram ................................................................................................ 626
28.3.3 Register Configuration..................................................................................... 628
28.3.4 Register Descriptions....................................................................................... 629
28.3.5 Description of Operation.................................................................................. 635
28.4 HSW (Head-switch) Timing Generator......................................................................... 650
28.4.1 Overview......................................................................................................... 650
28.4.2 Block Diagram ................................................................................................ 650
28.4.3 Composition .................................................................................................... 652
28.4.4 Register Configuration..................................................................................... 653
28.4.5 Register Descriptions....................................................................................... 653
28.4.6 Description of Operation.................................................................................. 669
28.4.7 Interrupt .......................................................................................................... 675
28.4.8 Cautions .......................................................................................................... 676
28.5 Four-head High-speed Switching Circuit for Special Playback...................................... 677
28.5.1 Overview......................................................................................................... 677
28.5.2 Block Diagram ................................................................................................ 677
28.5.3 Pin Configuration ............................................................................................ 678
28.5.4 Register Description ........................................................................................ 678
28.6 Drum Speed Error Detector .......................................................................................... 681
28.6.1 Overview......................................................................................................... 681
28.6.2 Block Diagram ................................................................................................ 681