Renesas Hitachi H8S/2191, Hardware Manual, Page: 650 / 1065

Rev. 2.0, 11/00, page 623 of 1037
(5) CTL Gain Control Register (CTLGR)
0
0
1
0
2
0
3
0
4
0
5 6 7
— —
— —
CTLFB CTLGR3 CTLGR2 CTLGR1 CTLGR0
1 1
R/W R/W R/W
0
CTLE/
R/W R/W R/W
Bit :
Initial value :
R/W :
Sets the CTLFB switch in the CTL amplifier circuit to on/off and CTL amplifier gain.
CTLGR is an 8-bit read/write register. Bits 7 and 6 are reserved. No write in it is valid. If read
is attempted, an undetermined value is read out. It is initialized to H'C0 by a reset or stand-by.
Bit 7 to 6: Reserved
Reserved bits; writes are disabled. If read was attempted, an undetermined value is read out.
Bit 5: CTL Selection Bit (CTLE/
$
$)
Controls whether the amplifier output or EXCTL is used as the CTLP signal supplied to the CTL
circuit.
Bit 5
CTLE/
$$
Description
0 AMP output (Initial value)
1 EXCTL
Bit 4: SW Bit of the Feedback Section of CTL Amplifier (CTLFB)
Turning on/off the SW of the feedback section allows adjustment of gain.
See figure 28.4, CTL Input Circuit.
Bit 4
CTLFB Description
0 Turns off CTLFB SW (Initial value)
1 Turns on CTLFB SW