Renesas Hitachi H8S/2191, Hardware Manual

Page: 1032 / 1065

Rev. 2.0, 11/00, page 1005 of 1037
H'FFE5: Realtime Output Trigger Select Register RTPSR: I/O Port
0
0
1
0
R/W
2
0
R/W
3
0
4
0
R/W
0
R/W
5 6
0
7
RTPSR4 RTPSR3 RTPSR2 RTPSR1 RTPSR0
0
R/W
RTPSR7
R/W R/W R/W
RTPSR6 RTPSR5
External trigger (TRIG pin) input is selected
Internal triggfer (HSW) input is selected
0
1
(n = 7 to 0)
Bit :
Initial value :
R/W :
H'FFE8: System Control Register SYSCR: System Control
0
1
1
0
R/W
2
0
R/W
3
1
4
0
R/W
5
0
6
0
7
R R
INTM1 INTM0 XRST NMIEG1 NMIEG0
0
0 0 0 Interrupt is controlled by I bit
INTM0 INTM1
Interrupt
control mode
Interrupt control
1 1 Interrupt is controlled by I and UI bits and ICR
0 1 2 Cannot be used in the H8S/2194 Series
1 3 Cannot be used in the H8S/2194 Series
0 0 Interrupt request is generated at falling edge of NMI input
NMIEG0 NMIEG1
1 Interrupt request is generated at rising edge of NMI input
* 1 Interrupt request is generated at rising or falling edge of NMI input
Reset is generated by watchdog timer overflow
Reset is generaed by external reset input
0
1
Interrupt control mode
External reset
NMI edge select bits
NMI edge select
Note: * Don't care.
Bit :
Initial value :
R/W :
— — —
— — —