Renesas Hitachi H8S/2191, Hardware Manual

Page: 360 / 1065

Rev. 2.0, 11/00, page 333 of 1037
16.1.3 Pin Configuration
Table 16.1 shows the pin configuration of the Timer R.
Table 16.1 Pin Configuration
Name Abbrev. I/O Function
Input capture inputting pin
,54
Input Input capture inputting for the Timer R
16.1.4 Register Configuration
Table 16.2 shows the register configuration of the Timer R.
Table 16.2 Register Configuration
Name Abbrev. R/W Size Initial Value Address
Timer R mode register 1 TMRM1 R/W Byte H'00 H'D118
Timer R mode register 2 TMRM2 R/W Byte H'00 H'D119
Timer R control/status
register TMRCS R/W Byte H'03 H'D11F
Timer R capture register 1 TMRCP1 R Byte H'FF H'D11A
Timer R capture register 2 TMRCP2 R Byte H'FF H'D11B
Timer R load register 1 TMRL1 W Byte H'FF H'D11C
Timer R load register 2 TMRL2 W Byte H'FF H'D11D
Timer R load register 3 TMRL3 W Byte H'FF H'D11E
Note: Memories of respective registers will be preserved even under the low power consumption
mode. Nonetheless, the CAPF flag and SLW flag of the TMRM2 will be cleared to 0.