Renesas Hitachi H8S/2191, Hardware Manual

Page: 961 / 1065

Rev. 2.0, 11/00, page 934 of 1037
H'D064: FIFO Output Pattern Register 1 FPDRA: HSW Timing Generator
8
*
9
*
W
10
*
W
11
*
12
*
W
*
W
13 14
*
15
NarrowFFA VFFA AFFA VpulseA MlevelA
1
W W W
ADTRGA STRIGA
0
*
1
*
W
2
*
W
3
*
4
*
W
*
W
5 6
*
7
PPGA4 PPGA3 PPGA2 PPGA1 PPGA0
*
W
PPGA7
W W W
PPGA6 PPGA5
Bit :
Initial value :
R/W :
Bit :
Initial value :
R/W :
—
—
H'D066: FIFO Timing Pattern Register 1 FTPRA: HSW Timing Generator
Bit :
Initial value :
R/W :
1
*
W
FTPRA1
0
*
W
FTPRA0
3
*
W
FTPRA3
2
*
W
FTPRA2
5
*
W
FTPRA5
4
*
W
FTPRA4
7
*
W
FTPRA7
6
*
W
FTPRA6
9
*
W
FTPRA9
8
*
W
FTPRA8
11
*
W
FTPRA11
10
*
W
FTPRA10 FTPRA13 FTPRA12 FTPRA15 FTPRA14
12
*
13
*
14
*
15
*
W W W W
H'D066: FIFO Timer Capture Register 1 FTCTR: HSW Timing Generator
Bit :
Initial value :
R/W :
1
0
R
FTCTR1
0
0
R
FTCTR0
3
0
R
FTCTR3
2
0
R
FTCTR2
5
0
R
FTCTR5
4
0
R
FTCTR4
7
0
R
FTCTR7
6
0
R
FTCTR6
9
0
R
FTCTR9
8
0
R
FTCTR8
11
0
R
FTCTR11
10
0
R
FTCTR10 FTCTR13 FTCTR12 FTCTR15 FTCTR14
12
0
13
0
14
0
15
0
R R R R
H'D068: FIFO Output Pattern Register 2 FPDRB: HSW Timing Generator
8
*
9
*
W
10
*
W
11
*
12
*
W
*
W
13 14
*
15
NarrowFFB VFFB AFFB VpulseB MlevelB
1
W W W
ADTRGB STRIGB
0
*
1
*
W
2
*
W
3
*
4
*
W
*
W
5 6
*
7
PPGB4 PPGB3 PPGB2 PPGB1 PPGB0
*
W
PPGB7
W W W
PPGB6 PPGB5
Bit :
Initial value :
R/W :
Bit :
Initial value :
R/W :
—
—
Note: * Undetermined