Renesas Hitachi H8S/2191, Hardware Manual

Page: 649 / 1065

Rev. 2.0, 11/00, page 622 of 1037
(4) Servo Monitor Control Register (SVMCR)
0
0
1
0
2
0
3
0
4
0
5 6 7
— —
— —
SVMCR4 SVMCR3 SVMCR2 SVMCR1 SVMCR0
1 1
R/W R/W R/W
0
SVMCR5
R/W R/W R/W
Bit :
Initial value :
R/W :
Selects the monitor signal output to the SV1 and SV2 pins when the P82/SV1 pin is used as the
SV1 monitor output pin or when the P83/SV2 pin is used as the SV2 monitor output pin.
SVMCR is an 8-bit read/write register. Bits 7 and 6 are reserved. Writes are disabled. If read is
attempted, an undetermined value is read out. It is initialized to H'C0 by a reset or stand-by.
Bit 5 Bit 4 Bit 3
SVMCR5 SVMCR4 SVMCR3 Description
0 Outputs REF30 signal to SV2 output pin (Initial value) 0
1 Outputs CAPREF30 signal to SV2 output pin
0 Outputs CREF signal to SV2 output pin
0
1
1 Outputs CTLMONI signal to SV2 output pin
0 Outputs DVCFG signal to SV2 output pin 0
1 Outputs CFG signal to SV2 output pin
0 Outputs DFG signal to SV2 output pin
1
1
1 Outputs DPG signal to SV2 output pin
Bit 2 Bit 1 Bit 0
SVMCR2 SVMCR1 SVMCR0 Description
0 Outputs REF30 signal to SV1 output pin (Initial value) 0
1 Outputs CAPREF30 signal to SV1 output pin
0 Outputs CREF signal to SV1 output pin
0
1
1 Outputs CTLMONI signal to SV1 output pin
0 Outputs DVCFG signal to SV1 output pin 0
1 Outputs CFG signal to SV1 output pin
0 Outputs DFG signal to SV1 output pin
1
1
1 Outputs DPG signal to SV1 output pin