NXP Semiconductors PXN2020, Reference Manual, Page: 807 / 1376

Media Local Bus (MLB)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 27-35
• A Buffer Done interrupt is generated (CSCR n [STS[2]] set) when the last quadlet from the last
packet (in the Current Buffer ) has been successfully transmitted. (See Note 6 in Figure 27-19 ).
Single-packet buffering of asynchronous and control TX packets should be handled in the same manner
described for multi-packet buffering.
27.4.6.2 Isochronous and Synchronous Data Handling
Reception and transmission of isochronous and synchronous data should be handled in the following
manner:
• At the start of buffer processing, the beginning of the Next Buffer becomes the beginning of the
Current Buffer , as CNBCR n [BSA] is loaded into CCBCR n [BCA]. Additionally, the end of the
Next Buffer becomes the end of the Current Buffer , as CNBCR n [BEA] is loaded into
CCBCR n .[BFA]. (See Note 1 in Figure 27-20 ).
• A Buffer Start interrupt is generated (CSCR n [STS[3]] set), which informs software that hardware
has updated CCBCR n , cleared the local channel CSCR n [RDY] bit, and is available to accept the
next buffer. Software may then prepare the Next Buffer by writing CNBCR n [BSA],
CNBCR n [BEA], and CSCR n [RDY]. (See Note 2 in Figure 27-20 ).
• During the processing of the Current Buffer , CCBCR n [BCA] continues to mark which quadlet of
the isochronous or synchronous data is currently being processed. (See Note 3 in Figure 27-20 ).
• A Buffer Done interrupt is generated (CSCR n [STS[2]] set) when the last quadlet in the
Current Buffer has been successfully transmitted/received. (See Note 4 in Figure 27-20 ).
An example of buffer processing for isochronous and synchronous channels is provided in Figure 27-20 .