NXP Semiconductors PXN2020, Reference Manual, Page: 1192 / 1376

Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
36-42 Freescale Semiconductor
Table 36-29 illustrates the range that selected for data trace for various cases of DTSA being less than,
greater than, or equal to DTEA.
NOTE
DTSA must be less than DTEA in order to guarantee correct data write/read
traces. Data trace ranges are inclusive of the DTSA and DTEA addresses for
Range Control settings indicating “within range”, and are exclusive of the
DTSA and DTEA addresses for Range Control settings indicating “outside
of range.”
36.6.9 Register Access via JTAG / OnCE
Access to Nexus3 register resources is enabled by loading a single instruction (ACCESS_AUX_TAP_Z6)
into the JTAGC instruction register (IR), and then loading the corresponding OnCE OCMD register with
the NEXUS3_ACCESS instruction (refer to
Table 36-2 ). For the module, the OCMD value is
0b00_0111_1100.
Once the ACCESS_AUX_TAP_Z6 instruction has been loaded, the JTAG/OnCE port allows tool/target
communications with all Nexus3 registers according to the register map in
Table 36-19 .
Nexus Reg: 0x12 Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Data Trace End Address
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 36-24. Data Trace End Address Register 1 (DTEA1)
Nexus Reg: 0x13 Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Data Trace End Address
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 36-25. Data Trace End Address Register 2 (DTEA2)
Table 36-29. Data Trace—Address Range Options
Programmed Values Range Control Bit Value Range Selected
DTSA < DTEA 0 DTSA
 
DTEA
DTSA < DTEA 1

DTSA DTEA

DTSA > DTEA N/A Invalid range—no trace
DTSA = DTEA N/A Invalid range—no trace