NXP Semiconductors PXN2020, Reference Manual, Page: 1040 / 1376

Enhanced Serial Communication Interface (eSCI)
PXN20 Microcontroller Reference Manual, Rev. 1
31-50 Freescale Semiconductor
31.4.6.5.6 Checksum Error Detection
If the checksum enable bit CSE in the eSCI LIN Transmit Register (eSCI_LTR) is set, checksum checking
is performed based on the received checksum byte. The checksum mode is selected by the CSM bit in the
eSCI LIN Transmit Register (eSCI_LTR). If the value received in the checksum bytes does not match the
calculated checksum, the checksum error flag CKERR in the eSCI Interrupt Flag and Status Register 2
(eSCI_IFSR2) is set.
31.4.6.5.7 CRC Error Detection
CRC checking is performed on the two received CRC bytes CRC1 and CRC2 if the CRC Enhanced LIN
frame format was selected by the CRC bit in the eSCI LIN Transmit Register (eSCI_LTR). If the value
received in the two CRC bytes did not match the calculated CRC pattern, the CRC error flag CERR in the
eSCI Interrupt Flag and Status Register 2 (eSCI_IFSR2) is set.
31.4.6.5.8 Overflow Detection
When the receiver has received the next byte field to be transferred into the eSCI LIN Receive Register
(eSCI_LRR), but neither the application nor the RX DMA channel have read data from this register since
the last update, the received data overflow flag OVFL in the eSCI Interrupt Flag and Status Register 2
(eSCI_IFSR2) is set. In this case, the content of the eSCI LIN Receive Register (eSCI_LRR) is not
changed. The data received most recently are lost.
31.4.6.6 LIN Wakeup
The section describes the LIN wakeup behavior of the eSCI module.
31.4.6.6.1 LIN Wakeup Generation
The eSCI module can cause the LIN bus to exit the sleep mode by sending a break character. The
application triggers the transmission of a break character by writing 1 to the LIN bus wakeup trigger WU
in the eSCI LIN Control Register 1 (eSCI_LCR1). After the end of transmission of this break character,
the transmitter neither sets the TXRDY flag in the eSCI Interrupt Flag and Status Register 2 (eSCI_IFSR2)
nor starts the transmission of frame data until the wakeup delimiter period has expired. The wakeup
delimiter period is defined by the WUD field in the eSCI LIN Control Register 1 (eSCI_LCR1).
To generate a valid wakeup character according to LIN 2.0, the eSCI first needs to be programmed to a
baud rate lower than 32 kbaud, then WU can be set. Should the application require a higher baud rate, then
this rate can be set once the wakeup character has been transmitted.
31.4.6.6.2 LIN Wakeup Reception
If the eSCI receives a valid wakeup condition on the selected receiver input, the LIN wakeup flag LWAKE
in the eSCI Interrupt Flag and Status Register 2 (eSCI_IFSR2) is set. Since each valid wakeup condition
violates the byte field structure, the frame error flag FE in the eSCI Interrupt Flag and Status Register 1
(eSCI_IFSR1) is also set.
The eSCI detects the following conditions as valid wakeup conditions:
• Reception of a break signal