
Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
36-99
2. The data can then be read from the read/write access data register (RWD) through the access
Section 36.7.8, Register Access via JTAG / OnCE
, using the Nexus
).
3. Repeat steps 3 and 4 in
Section 36.7.9.5.3, Single Read Access
until the CNT value is zero (0).
When this occurs, the DV bit within the RWCS is set to indicate the end of the block read access.
36.7.9.5.5
Error Handling
The module handles various error conditions as follows:
System Bus Read/Write Error
All address and data errors that occur on read/write accesses to the e200z0 system bus return a transfer
error. If this occurs:
1. The access is terminated without re-trying (AC bit is cleared).
2. The ERR bit in the RWCS register is set.
3. The error message is sent (TCODE = 8) indicating read/write error.
Access Termination
The following cases are defined for sequences of the read/write protocol that differ from those described
in the above sections:
1. If the AC bit in the RWCS register is set to start read/write accesses and invalid values are loaded
into the RWD and/or RWA, then a system bus access error may occur. This is handled as described
above.
2. If a block access is in progress (all cycles not completed), and the RWCS register is written, then
the original block access is terminated at the boundary of the nearest completed access.
a) If the RWCS is written with the AC bit set, the next read/write access begins and the RWD can
be written to/ read from.
b) If the RWCS is written with the AC bit cleared, the read/write access is terminated at the nearest
completed access. This method can be used to break (early terminate) block accesses.
36.7.9.5.6
Read/Write Access Error Message
The read/write access error message is sent out when an system bus access error (read or write) has
occurred.
Error information is messaged out in the following format:
Figure 36-79. Error Message Format
ECODE (00011)
MSB
LSB
1
2
SRC
TCODE (001000)
3
6 bits
4 bits
5 bits
Fixed length = 15 bits
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...