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IEEE 1149.1 Test Access Port Controller (JTAGC)
PXN20 Microcontroller Reference Manual, Rev. 1
35-6
Freescale Semiconductor
35.3.3
Device Identification Register
The device identification register, shown in
, allows the part revision number, design center,
part identification number, and manufacturer identity code to be determined through the TAP. The device
identification register is selected for serial data transfer between TDI and TDO when the IDCODE
instruction is active. Entry into the capture-DR state while the device identification register is selected
loads the IDCODE into the shift register to be shifted out on TDO in the Shift-DR state. No action occurs
in the update-DR state.
35.3.4
Boundary Scan Register
The boundary scan register is connected between TDI and TDO when the EXTEST, SAMPLE, or
SAMPLE/PRELOAD instructions are active. It is used to capture input pin data, force fixed values on
output pins, and select a logic value and direction for bidirectional pins. Each bit of the boundary scan
register represents a separate boundary scan register cell, as described in the IEEE 1149.1-2001 standard
and discussed in
Section 35.4.5, Boundary Scan.
35.4
Functional Description
35.4.1
JTAGC Reset Configuration
While in reset, the TAP controller is forced into the test-logic-reset state, thus disabling the test logic and
allowing normal operation of the on-chip system logic. The instruction register is also loaded with the
IDCODE instruction.
IR[4:0]: 0_0001 (IDCODE)
Access: User read only
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PRN
DC
PIN
MIC
ID
W
Reset
1
1
PRN default value is 0x0 for the device’s initial mask set and changes for each mask set revision.
*
*
*
*
1
0
0
0
0
0
1
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
1
Figure 35-4. Device Identification Register
Table 35-1. Device Identification Register Field Descriptions
Field
Description
PRN
Part Revision Number. Contains the revision number of the device. This field changes with each revision of the device
or module.
DC
Design Center. Indicates the Freescale design center. For the PXN20 family this value is 0x20.
PIN
Part Identification Number. Contains the part number of the device. For the PXN20 family, this value is 0x268.
MIC
Manufacturer Identity Code. Contains the reduced Joint Electron Device Engineering Council (JEDEC) ID for
Freescale, 0xE.
ID
IDCODE Register ID. Identifies this register as the device identification register and not the bypass register. Always
set to 1.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
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Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...