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Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
A-34
Freescale Semiconductor
0x03E0
MBCCSR92–Message buffer configuration, control, status
register 92
R/W
0x0000
0x03E2
MBCCFR92–Message buffer cycle counter filter register 92
R/W
—
0x03E4
MBFIDR92–Message buffer frame ID register 92
R/W
0x0UUU
0x03E6
MBIDXR92–Message buffer index register 92
R/W
0x00UU
0x03E8
MBCCSR93–Message buffer configuration, control, status
register 93
R/W
0x0000
0x03EA
MBCCFR93–Message buffer cycle counter filter register 93
R/W
—
0x03EC
MBFIDR93–Message buffer frame ID register 93
R/W
0x0UUU
0x03EE
MBIDXR93–Message buffer index register 93
R/W
0x00UU
0x03F0
MBCCSR94–Message buffer configuration, control, status
register 94
R/W
0x0000
0x03F2
MBCCFR94–Message buffer cycle counter filter register 94
R/W
—
0x03F4
MBFIDR94–Message buffer frame ID register 94
R/W
0x0UUU
0x03F6
MBIDXR94–Message buffer index register 94
R/W
0x00UU
0x03F8
MBCCSR95–Message buffer configuration, control, status
register 95
R/W
0x0000
0x03FA
MBCCFR95–Message buffer cycle counter filter register 95
R/W
—
0x03FC
MBFIDR95–Message buffer frame ID register 95
R/W
0x0UUU
0x03FE
MBIDXR95–Message buffer index register 95
R/W
0x00UU
0x0400
MBCCSR96–Message buffer configuration, control, status
register 96
R/W
0x0000
0x0402
MBCCFR96–Message buffer cycle counter filter register 96
R/W
—
0x0404
MBFIDR96–Message buffer frame ID register 96
R/W
0x0UUU
0x0406
MBIDXR96–Message buffer index register 96
R/W
0x00UU
0x0408
MBCCSR97–Message buffer configuration, control, status
register 97
R/W
0x0000
0x040A
MBCCFR97–Message buffer cycle counter filter register 97
R/W
—
0x040C
MBFIDR97–Message buffer frame ID register 97
R/W
0x0UUU
0x040E
MBIDXR97–Message buffer index register 97
R/W
0x00UU
0x0410
MBCCSR98–Message buffer configuration, control, status
register 98
R/W
0x0000
0x0412
MBCCFR98–Message buffer cycle counter filter register 98
R/W
—
0x0414
MBFIDR98–Message buffer frame ID register 98
R/W
0x0UUU
0x0416
MBIDXR98–Message buffer index register 98
R/W
0x00UU
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
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Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...