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FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
26-28
Freescale Semiconductor
26.5.2.15 CHI Error Flag Register (CHIERFR)
This register holds the CHI related error flags. The interrupt generation for each of these error flags is
controlled by the CHI interrupt enable bit CHIE in the
Global Interrupt Flag and Enable Register (GIFER)
PECF_IE
Protocol Engine Communication Failure Interrupt Enable — This bit controls PECF_IF interrupt request
generation.
0 interrupt request generation disabled.
1 interrupt request generation enabled.
PSC_IE
Protocol State Changed Interrupt Enable — This bit controls PSC_IF interrupt request generation.
0 interrupt request generation disabled.
1 interrupt request generation enabled.
SSI3_IE
SSI2_IE
SSI1_IE
SSI0_IE
Slot Status Counter Incremented Interrupt Enable — This bit controls SSI[3:0]_IF interrupt request
generation.
0 interrupt request generation disabled.
1 interrupt request generation enabled.
EVT_IE
Even Cycle Table Written Interrupt Enable — This bit controls EVT_IF interrupt request generation.
0 interrupt request generation disabled.
1 interrupt request generation enabled.
ODT_IE
Odd Cycle Table Written Interrupt Enable — This bit controls ODT_IF interrupt request generation.
0 interrupt request generation disabled.
1 interrupt request generation enabled.
Base + 0x0020
Write: Normal Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R FRLB
_EF
FRLA
_EF
PCMI
_EF
FOVB
_EF
FOVA
_EF
MBS
_EF
MBU
_EF
LCK
_EF
DBL
_EF
SBCF
_EF
FID
_EF
DPL
_EF
SPL
_EF
NML
_EF
NMF
_EF
ILSA
_EF
W
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
w1c
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-15. CHI Error Flag Register (CHIERFR)
Table 26-21. CHIERFR Field Descriptions
Field
Description
FRLB_EF
Frame Lost Channel B Error Flag — This flag is set if a complete frame was received on channel B but could
not be stored in the selected individual message buffer because this message buffer is currently locked by the
application. In this case, the frame and the related slot status information are lost.
0 No such event.
1 Frame lost on channel B detected.
FRLA_EF
Frame Lost Channel A Error Flag — This flag is set if a complete frame was received on channel A but could
not be stored in the selected individual message buffer because this message buffer is currently locked by the
application. In this case, the frame and the related slot status information are lost.
0 No such error.
1 Frame lost on channel A detected.
Table 26-20. PIER1 Field Descriptions (continued)
Field
Description
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
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Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...