NXP Semiconductors PXN2020, Reference Manual, Page: 100 / 1376

Signal Description
PXN20 Microcontroller Reference Manual, Rev. 1
3-32 Freescale Semiconductor
3.4.7.6 PG5 — GPIO (PG[5]) / DSPI_D Peripheral Chip Select (PCS_D[4]) / I
2
C_B
Serial Data Line (SDA_B) / Analog Input (AN[53])
PG[5] is a GPIO pin. PCS_D[4] is a peripheral chip select output pin for the DSPI D module. SDA_B is
the serial data line for the I
2
C_B module. AN[53] is a single-ended analog input pin.
3.4.7.7 PG6 — GPIO (PG[6]) / DSPI_C Peripheral Chip Select (PCS_C[1]) /
Ethernet Management Data Clock (FEC_MDC) / Analog Input (AN[54])
PG[6] is a GPIO pin. PCS_C[1] is a peripheral chip select output pin for the DSPI C module. FEC_MDC
is the Ethernet management data clock output pin. AN[54] is a single-ended analog input pin.
3.4.7.8 PG7 — GPIO (PG[7]) / DSPI_C Peripheral Chip Select (PCS_C[2]) /
Ethernet Management Data I/O (FEC_MDIO) / Analog Input (AN[55])
PG[7] is a GPIO pin. PCS_C[2] is a peripheral chip select output pin for the DSPI C module. FEC_MDIO
is the Ethernet management data I/O pin. AN[55] is a single-ended analog input pin.
3.4.7.9 PG8 — GPIO (PG[8]) / eMIOS Channel (eMIOS[7]) / Ethernet Transmit
Clock (FEC_TX_CLK) / Analog Input (AN[56])
PG[8] is a GPIO pin. eMIOS[7] is an input/output channel pin for the eMIOS200 module. FEC_TX_CLK
is the Ethernet transmit clock input pin. AN[56] is a single-ended analog input pin.
3.4.7.10 PG9 — GPIO (PG[9]) / eMIOS Channel (eMIOS[6]) / Ethernet Carrier
Sense (FEC_CRS) / Analog Input (AN[57])
PG[9] is a GPIO pin. eMIOS[6] is an input/output channel pin for the eMIOS200 module. FEC_CRS is
the Ethernet carrier sense input pin. AN[57] is a single-ended analog input pin.
3.4.7.11 PG10 — GPIO (PG[10]) / eMIOS Channel (eMIOS[5]) / Ethernet Transmit
Error (FEC_TX_ER) / Analog Input (AN[58])
PG[10] is a GPIO pin.eMIOS[5] is an input/output channel pin for the eMIOS200 module. FEC_TX_ER
is the Ethernet transmit error output pin. AN[58] is a single-ended analog input pin.
3.4.7.12 PG11 — GPIO (PG[11]) / eMIOS Channel (eMIOS[4]) / Ethernet Receive
Clock (FEC_RX_CLK) / Analog Input (AN[59])
PG[11] is a GPIO pin. eMIOS[4] is an input/output channel pin for the eMIOS200 module. FEC_RX_CLK
is the Ethernet receive clock input pin. AN[59] is a single-ended analog input pin.
3.4.7.13 PG12 — GPIO (PG[12]) / eMIOS Channel (eMIOS[3]) / Ethernet Transmit
Data (FEC_TXD[0]) / Analog Input (AN[60])
PG[12] is a GPIO pin. eMIOS[3] is an input/output channel pin for the eMIOS200 module. FEC_TXD[0]
is an Ethernet transmit data output pin. AN[60] is a single-ended analog input pin.