NXP Semiconductors PXN2020, Reference Manual, Page: 953 / 1376

Deserial – Serial Peripheral Interface (DSPI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 30-27
30.3.2.15 DSPI DSI Configuration Register 1 (DSPI_DSICR1)
The DSI Configuration Register 1 selects various attributes associated with TSB configuration. The user
must not write to the DSPI_DSICR1 while the DSPI is in the running state. If TSB configuration is not
used, the register value is ignored.
Offset: DSP 0x00CC Access: Read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R DESER_DATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R DESER_DATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-16. DSPI Deserialization Data Register (DSPI_DDR)
Table 30-22. DSPI_DDR Field Description
Field Description
DESER_DATA Deserialized Data. When TSB configuration is set, the DESER_DATA field holds deserialized data that is
presented as signal states to the parallel output signals. If TSB is disabled, these bits are ignored, and only the
lower 16 bits are valid.
DESER_DATA Deserialized Data. The DESER_DATA field holds deserialized data that is presented as signal states to the
parallel output signals.
Address: DSP 0x00D0 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0
TSBCNT
0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0
DPCS1_
5
DPCS1_
4
DPCS1_
3
DPCS1_
2
DPCS1_
1
DPCS1_
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-17. DSPI DSI Configuration Register 1 (DSPI_DSICR1)