NXP Semiconductors PXN2020, Reference Manual, Page: 56 / 1376

Introduction
PXN20 Microcontroller Reference Manual, Rev. 1
1-14 Freescale Semiconductor
• Serialization of selected sources (eMIOS channels and Phantom ports in SIU)
1.7.13 Enhanced Modular Input Output System (Timers - eMIOS200)
The PXN20 family implement a scaled-down version of the eMIOS module:
• Supports timed I/O channels with 16-bit counter resolution
• Buffered updates
• Support for shifted PWM outputs to minimize occurrence of concurrent edges
• Supports configurable trigger outputs for ADC conversions for synchronization to channel output
waveforms
• Edge aligned output pulse width modulation
— Programmable pulse period and duty cycle
— Supports 0% and 100% duty cycle
— Shared or independent time bases
• Up to 32
1
single action channels offering input capture and output compare functions
• Up to 32
1
dual action channels offering output pulse width modulation,
• Up to 13
1
output pulse width and frequency modulation and center aligned output PWM channels
with dead time.
• Up to 5
1
modulus up/down counters that can be used to drive counter buses.
• DMA transfer support available
1.7.14 Periodic Interrupt Timer Module (PIT)
The PIT features the following:
• Up to 8 general purpose interrupt timers
• Up to 2 interrupt timers for triggering ADC conversions
• 32-bit counter resolution
• Clocked by system clock frequency
1.7.15 System Timer Module (STM)
One STM supporting
• One 32-bit up counter with 8-bit prescaler
• Four 32-bit compare channels running off the same up-counter
• Independent interrupt source for each channel
• Clocked by the main system clock
• Instantiated in the same CPU clock domain
• Counter can be stopped in debug mode
1. Depends on pin muxing and product derivative