NXP Semiconductors PXN2020, Reference Manual, Page: 224 / 1376

System Integration Unit (SIU)
PXN20 Microcontroller Reference Manual, Rev. 1
8-42 Freescale Semiconductor
Offset: SI 0x09AC Access: User read-only
0
1
1
1
2
1
3
1
4
1
5
1
6 7 8
1
9 10 11 12 13 14 15
R
0 0 0 0 0 0
HLT
ACK
6
HLT
ACK
7
0
HLT
ACK
9
HLT
ACK
10
HLT
ACK
11
HLT
ACK
12
HLT
ACK
13
HLT
ACK
14
HLT
ACK
15
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24
1
25
1
26 27 28 29 30
1
31
R HLT
ACK
16
HLT
CK
17
HLT
ACK
18
HLT
ACK
19
HLT
ACK
20
HLT
ACK
21
HLT
ACK
22
HLT
ACK
23
0 0
HLT
ACK
26
HLT
ACK
27
HLT
ACK
28
HLT
ACK
29
0
HLT
ACK
31
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
Setting the corresponding bit in SIU_HLT0 sets this bit, but has no other effect.
Figure 8-28. Halt Acknowledge Register 0 (SIU_HLTACK0)
Table 8-29. SIU_HLTACK0 Register Field Descriptions
Field Description
HLTACK6 Halt acknowledge bit 6. When this bit is set, the EMIOS200 module is halted.
HLTACK7 Halt acknowledge bit 7. When this bit is set, the PIT module is halted.
HLTACK9 Halt acknowledge bit 9. When this bit is set, the CTU module is halted.
HLTACK10 Halt acknowledge bit 10. When this bit is set, the FLEXCAN_F module is halted.
HLTACK11 Halt acknowledge bit 11. When this bit is set, the FLEXCAN_E module is halted.
HLTACK12 Halt acknowledge bit 12. When this bit is set, the FLEXCAN_D module is halted.
HLTACK13 Halt acknowledge bit 13. When this bit is set, the FLEXCAN_C module is halted.
HLTACK14 Halt acknowledge bit 14. When this bit is set, the FLEXCAN_B module is halted.
HLTACK15 Halt acknowledge bit 15. When this bit is set, the FLEXCAN_A module is halted.
HLTACK16 Halt acknowledge bit 16. When this bit is set, the ESCI_H module is halted.
HLTACK17 Halt acknowledge bit 17. When this bit is set, the ESCI_G module is halted.
HLTACK18 Halt acknowledge bit 18. When this bit is set, the ESCI_F module is halted.
HLTACK19 Halt acknowledge bit 19. When this bit is set, the ESCI_E module is halted.
HLTACK20 Halt acknowledge bit 20. When this bit is set, the ESCI_D module is halted.
HLTACK21 Halt acknowledge bit 21. When this bit is set, the ESCI_C module is halted.
HLTACK22 Halt acknowledge bit 22. When this bit is set, the ESCI_B module is halted.
HLTACK23 Halt acknowledge bit 23. When this bit is set, the ESCI_A module is halted.
HLTACK26 Halt acknowledge bit 26. When this bit is set, the DSPI_B module is halted.
HLTACK27 Halt acknowledge bit 27. When this bit is set, the DSPI_A module is halted.
HLTACK28 Halt acknowledge bit 28. When this bit is set, the I
2
C_B module is halted.